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Jack Elliott's blog

24

Mar

2013

This week I spent some time installing, configuring and familiarizing myself with the Bro software. Next week I will begin looking how to analyse a captured set of network traffic and learn how Bro outputs it findings.

15

Mar

2013

This week I spent time researching the Bro Network Security System in order to research and write my COMP520 proposal. I also arranged to have to virtual machines setup to begin testing Bro on.

11

Feb

2013

This week I focused on changing the NTP software to make it interface correctly with the FPGA hardware, this involves finding all the locations in which the time value for the system is set or adjusted. I also spent some time trying to get the pulse per second signal we receive from the gps registering in the Linux system so that it can be used to discipline the clock.

21

Jan

2013

This week I worked on integrating the work I had done with getting linux running on the Zedboard with the NTP logic being worked on by Mark. I also began editing the NTP server software so that it interfaces correctly with our custom implementation.

16

Dec

2012

This week I worked on re-factoring the driver and software to simplify the system and make the functionality more like that of a standard NTP server running in software. I also began drawing up the documentation for the project and putting together the project website.

07

Dec

2012

This week Mark and I created some logic in the FPGA which generates an interrupt to the ARM processing system when a button on the board is pushed (eventually the interrupt will fire when the log buffer is full). On the software side, I wrote a new driver for this peripheral which includes a handler for the interrupt. I also wrote a user space program which will be initiated by the interrupt handler and will dump the log data generated by the NTP server to the SD card or transmit it to a remote server.

03

Dec

2012

This week I managed to create a custom peripheral inside the FPGA core. I also wrote a driver for the Linux system running on the board to communicate with the peripheral and transfer data back and forth. In this way, I was able to set and retrieve the values stored in 32 32-Byte registers on the FPGA. This will be used in the NTP project to assign operational parameters to the NTP server running on the FPGA core as well as retrieve usage data from the service.

25

Nov

2012

This week I managed to compile and install a Linux kernel and root file system unto one of the SD cards for the Zedboard. I Was then able to boot this kernel on the Zedboard and run a full Linux installation. The next step will be to collaborate with Mark to create some test logic such a register in the FPGA and expose it to the processing system and user programs running on the Linux install.

16

Nov

2012

I spent the first part of the week familiarising myself with the Zedboards and the Xilinx software tools and once that was done, I focused on installing a Linux distribution to run on the ARM cores of the board. This proved to be difficult as we continually ran into compatibility and licensing issues with the Xilinx tools. Hopefully the tools will be sorted out early next week and I will focus on installing Linux and from there, writing a driver to interface with the re-configurable logic on the board.